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    題名: 光體積變化描記圖法和心電肌電前端電路之生理訊號量測系統實現
    其他題名: Implementation of Biosignal Acquisition System and its Front-end Circuits for PPG, ECG, and EMG
    作者: 朱翊菖
    ZHU, YI-CHANG
    貢獻者: 科技學院永續綠色科技碩士學位學程
    賴信志
    LAI, SHIN-CHI
    關鍵詞: 生醫系統;微控制器;脈波傳播速率計算
    Biomedical System;Microcontroller Unit;Pulse Wave Velocity
    日期: 2020
    上傳時間: 2022-05-23 15:39:22 (UTC+8)
    摘要:   近幾年有許多的穿戴式裝置問世,許多平價的穿戴式都僅有量測心率的功能,而有血氧量測的售價又不平易近人,因此本論文設計具有心電描記圖(Electrocardiography,ECG) 、肌電描記圖(Electromyography, EMG)、光體積變化描記圖(Photoplethysmography, PPG)擷取電路的生理訊號量測系統,並且利用MCU(8051)將其收到的三種生理訊號利用BLE 傳送至Android 進行波形顯示。以及心率和脈波傳播速率計算 (Pulse Wave Velocity, PWV)等計算,讓使用者知道自身血管彈性是否正常,以利提早治療,進而降低罹患腦梗塞、心肌梗塞等疾病之機率。  在以Opencores 8051為基底進行ROM 和RAM 的修改後其時脈可以達到47.88MHz 相較於ATmega328P 的16MHz 快了2.99倍之多,因此在執行效率上會比ATmega328P 要快許多,也就能即時從ADC取出值並發送至Android 端,能降低MCU(8051)因執行速度造成的訊號延遲。  前端電路設計分為兩部份,首先在ECG/EMG 的電路中是由儀表放大器、0.1Hz-1KHz 之帶通濾波器、60Hz 帶拒濾波器和增益放大器所組成;第二部分在PPG 的電路需利用增益放大器和5Hz 低通濾波器,再搭配5Hz 數位濾波器將類比電路的訊號再次進行濾波使其訊號的雜訊濾除。  在最後,本論文的成本區分為兩個版本,其一是由市售的C8051F310做計算其成本僅有17.31 USD;而另一則是以DE0-Nano 嵌入OC8051取代MCU 控制其成本高達90.97 USD,但使用FPGA 是為了後期的晶片開發,目前僅是平台的驗證。總體而言,本論文提出的設計對於將來的應用會非常有用。
      In recent years, many wearable devices have come out, many affordable wearables only have the function of measuring heart rate, and the price of blood oxygen measurement is not approachable so that a physiological signal measurement system with Electrocardiography, Electromyography, and Photoplethysmography acquisition circuits, acquisition circuits is implemented in this thesis. In the proposed system, MCU (8051) connected a BLE to transmit the three physiological signals and the received data was directly displayed on the screen by an Android system. Calculations of the key indexes of heart rate and Pulse Wave Velocity (PWV) allow users to know whether their blood vessel elasticity is normal or not. As to facilitate early treatment, thereby reducing the chance of suffering from cerebral infarction, myocardial infarction and other diseases.  After using the Opencores of 8051 with a little modification of the ROM and RAM, the clock can achieve to 47.88MHz, which is 2.99 times faster than the 16MHz of the ATmega328P. Furthermore, the execution efficiency will become much faster than the ATmega328P due to the fact that The ADC takes the value very fast and then sends the digitalized data to the Android side, This implies that it can reduce the signal delay caused by the execution speed of the MCU.  The front-end circuit design is divided into two parts. First Part: The ECG/EMG circuit is composed of an instrumentation amplifier, a bandpass filter of 0.1Hz-1KHz, a 60Hz band rejection filter, and a gain amplifier; Second Part: the PPG circuit needs to use a gain amplifier, 5Hz low-pass analogy filter, and 5Hz digital filter to reduce the noise from the signal.  In the end, the proposed design has two versions. One is the commercial C8051F310 to be kernel and the cost would take only 17.31 USD; the other is DE0-Nano platform embedded OC8051 and its cost is as high as 90.97 USD, but the FPGA is used for further application-specific integrated circuit (asic) development, so the current state is only for the verification of the entire system platform. Overall, the proposed design would be very useful for future applications.
    顯示於類別:[永續綠色科技碩士學位學程] 博碩士論文

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